RAS=000, WR=0, CL=others
SDRAM Timing Register
| CL | SDRAMC Column Latency 0 (others): Setting prohibited 1 (001): 1 cycle 2 (010): 2 cycles 3 (011): 3 cycles |
| WR | Write Recovery Interval 0 (0): 1 cycle 1 (1): 2 cycles |
| RP | Row Precharge Interval ( RP+1 cycles ) |
| RCD | Row Column Latency ( RCD+1 cycles ) |
| RAS | Row Active Interval 0 (000): 1 cycle 1 (001): 2 cycles 2 (010): 3 cycles 3 (011): 4 cycles 4 (100): 5 cycles 5 (101): 6 cycles 6 (110): 7 cycles 7 (111): Setting prohibited |